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[Other resource] SPI-PRT

Description: 昨天在论坛上看到有人帖出了他写的并串转换VHDL代码，但是他自己说有问题，但是不知道怎么改。我大概看了一下，发现思路还是比较乱的。于是就写下了我自己的并串转换代码。-yesterday at the forum see someone points out his writing and string conversion VHDL code, But he said there are problems, but does not know how reform. I probably watched and found ideas is quite a mess. So I wrote on their own code and string conversion.
Platform: | Size: 1013 | Author: ZHAOBOO | Hits:

[MPI] SPI-PRT

Description: 昨天在论坛上看到有人帖出了他写的并串转换VHDL代码，但是他自己说有问题，但是不知道怎么改。我大概看了一下，发现思路还是比较乱的。于是就写下了我自己的并串转换代码。-yesterday at the forum see someone points out his writing and string conversion VHDL code, But he said there are problems, but does not know how reform. I probably watched and found ideas is quite a mess. So I wrote on their own code and string conversion.
Platform: | Size: 1024 | Author: ZHAOBOO | Hits:

[VHDL-FPGA-Verilog] CUS_SPI-VHDL

Description: 此为VHDL的SPI通信代码，全部在一个压缩包中，请仔细阅读后再使用．-this as VHDL code SPI communication, all in a compressed package, please read carefully before use.
Platform: | Size: 4096 | Author: 藏瑞 | Hits:

[VHDL-FPGA-Verilog] IP_SPI

Description: spi总线的vhdl代码，试了试可以用。希望能对开发者有所帮助。-spi bus vhdl code Shileshi can use. The hope is to help developers.
Platform: | Size: 344064 | Author: 李鸣 | Hits:

[VHDL-FPGA-Verilog] spi

Description: VHDL实现SPI功能源代码 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register between the "master" and the "slave". Typically both the -- master and slave have an 8 bit shift register so the combined -- register is 16 bits. When an SPI transfer takes place, the master and -- slave shift their shift registers 8 bits and thus exchange their 8 -- bit register values.-SPI realize the functional VHDL source code The SPI bus is a 3 wire bus that in effect links a serial shift register between the
Platform: | Size: 65536 | Author: 阿飞 | Hits:

[VHDL-FPGA-Verilog] spi

Description: SPI总线，VHDL语言，硬件描述语言源码-SPI bus, VHDL language, hardware description language source code
Platform: | Size: 3072 | Author: 郑文棋 | Hits:

[VHDL-FPGA-Verilog] spi.tar

Description: SPI(serial port interface)的Verilog/VHDL源代碼，已模擬並驗證。-SPI (serial port interface) of the Verilog/VHDL source code, has been simulated and verified.
Platform: | Size: 116736 | Author: hcjian | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: VHDL程序集锦，很多有用程序，英文版其中有汉明码编译码，优先译码等等。-VHDL Collection procedures, many useful procedures, the English version of them hamming code encoding and decoding, the priority decoder and so on.
Platform: | Size: 168960 | Author: 萍果 | Hits:

[ARM-PowerPC-ColdFire-MIPS] spi_boot.tar

Description: spi bootloader详细资料，里面包含C代码和VHDL代码以及相关的说明文档，有兴趣的朋友可以下来看看。-spi bootloader detailed information, which contains C code and VHDL code and related documentation, interested friends can see them.
Platform: | Size: 246784 | Author: zheng jun | Hits:

[VHDL-FPGA-Verilog] spi_boot-rel_3_2_rev_C.tar

Description: spi bootloader详细资料，里面包含C代码和VHDL代码以及testbench以及相关的说明文档，有兴趣的朋友可以下来看看。-spi bootloader detailed information, which contains C code and VHDL code and Testbench and related documentation, interested friends can see them.
Platform: | Size: 192512 | Author: zheng jun | Hits:

[VHDL-FPGA-Verilog] SPI_collect

Description: 有关SPI的vhdl实现。包括SPI官方协议，几篇开发时用到的论文，附加了中文注释的SPI IPcore，还有一个经过简化的master mode的SPI实现的vhdl代码-Related to the VHDL SPI realize. Including SPI official agreement, when used to develop several theses, Chinese notes attached SPI IPcore, there is a simplified master mode the SPI realize the VHDL code
Platform: | Size: 1334272 | Author: danielmu | Hits:

[VHDL-FPGA-Verilog] spi

Description: 一篇比较好的spi接口的vhdl实现的参考-A relatively good spi interface realize VHDL reference
Platform: | Size: 18432 | Author: 杨子树 | Hits:

[VHDL-FPGA-Verilog] SPI_Interface

Description: SPI接口的vhdl代码，可以实现与单片机的spi通信，完整的工程-SPI interface of the VHDL code can be achieved with SCM spi communication, complete works
Platform: | Size: 4096 | Author: wanyou2345 | Hits:

[VHDL-FPGA-Verilog] SimpleSpi

Description: SPI接口VHDL代码,内有说明,很详细.-SPI interface VHDL code, which has made it clear that, in great detail.
Platform: | Size: 180224 | Author: dushibiao | Hits:

[VHDL-FPGA-Verilog] VHDL-SPI-Module.doc

Description: 本spi参数化通讯模块是一个支持SPI串行通信协议从协议的SPI从接口。可通过改变参数设置传输的位数，由外部控制器给定脉冲控制传输。-The parameters of spi communication module is a support SPI serial communication protocol from the agreement from the SPI interface. By changing the parameter settings can be transmitted over the median, given by an external controller to control transmission pulse.
Platform: | Size: 37888 | Author: | Hits:

[VHDL-FPGA-Verilog] SPI

Description: 用VHDL语言写出SPI,内含资料和代码-VHDL language used to write SPI, containing data and code
Platform: | Size: 49152 | Author: th | Hits:

[Com Port] spi

Description: SPI master的verilog代码-Verilog code for SPI master
Platform: | Size: 2048 | Author: xudong | Hits:

[Other] spi.tar

Description: This is a verilog code used oversampled clock to implement SPI slave. Also include C code for a ARM processor as the SPI master-This is a verilog code used oversampled clock to implement SPI slave
Platform: | Size: 1024 | Author: johnl | Hits:

[VHDL-FPGA-Verilog] pico_code

Description: pico blaze VHDL code for write to micro SD flash with spi protocol
Platform: | Size: 19456 | Author: ali | Hits:

[VHDL-FPGA-Verilog] code

Description: spi接口 实现spi的传送 包括主从模式，时钟的建立。和数据的传送三部分-spi code very good for spi
Platform: | Size: 2048 | Author: 鲍鲍 | Hits:
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